There is, in fact, no performance reason to prefer big endian
or little endian formats. The formats are a product of history. Today, big endian order is the standard for network
data transfers, but only because the original TCP/IP protocols were developed on big endian machines.
Here is a representative sampling of machine instructions from the Intel x86 machine instruction set. Most
x86 instructions specify a ???source??? and a ???destination,??? where each can in general be a memory location or a
register. This list does not include every instruction; for instance, there are numerous variations of the jump
instruction, but they all transfer control from one point to another. This list does provide a comprehensive look
at all the types of instructions:
MOV move ???source??? to ???destination,??? leaving source unchanged
ADD add source to destination, and put sum in destination
SUB subtract source from destination, storing result in destination
DIV divide accumulator by source; quotient and remainder stored separately
IMUL signed multiply
DEC decrement; subtract 1 from destination
INC increment; add 1 to destination
AND logical AND of source and destination, putting result in destination
OR inclusive OR of source and destination, with result in destination
XOR exclusive OR of source and destination, with result in destination
NOT logical NOT, inverting the bits of destination
IN input data to the accumulator from an I/O port
OUT output data to port
JMP unconditional jump to destination
JG jump if greater; jump based on compare flag settings
JZ jump if zero; jump if the zero flag is set
BSF find the first bit set to 1, and put index to that bit in destination
BSWAP byte swap; reverses the order of bytes in a 32-bit word
BT bit test; checks to see if the bit indexed by source is set
CALL procedure call; performs housekeeping and transfers to a procedure
RET performs housekeeping for return from procedure
CLC clear the carry flag
CMP compare source and destination, setting flags for conditions
HLT halt the CPU
INT interrupt; create a software interrupt
LMSW load machine status word
LOOP loop until counter register becomes zero
NEG negate as two??™s complement
POP transfer data from the stack to destination
PUSH transfer data from source to stack
ROL rotate bits left
ROR rotate bits right
SAL shift bits left, filling right bits with 0
SAR shift bits right, filling left bits with the value of the sign bit
SHR shift bits right, filling left bits with 0
XCHG exchange contents of source and destination
38 COMPUTER ORGANIZATION [CHAP.
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