You need not
42 COMPUTER ORGANIZATION [CHAP. 3
show the bit pattern for each instruction; just use the mnemonics listed, followed in each case by the
appropriate operand(s).
3.10 What Intel x86 instructions would you use to accomplish subtraction using 2??™s complement addition?
This instruction set has a SUB instruction, but don??™t use that; write your own 2??™s complement routine
instead.
3.11 What are the advantages of a larger computer word size? Are there disadvantages? If so, what are the
disadvantages?
3.12 Assume that cache memory has an access time of 10 nanoseconds, while main memory has an access
time of 100 nanoseconds. If the ???hit rate??? of the cache is .70 (i.e., 70 percent of the time, the value
needed is already in the cache), what is the average access time to memory?
3.13 Assume our 1 GHz computer, which averages 3 cycles per instruction, is connected to the Internet via
a 10 Mbit connection (i.e., the line speed allows 10 million bits to pass every second). From the time
the computer receives the first bit, how many instructions can the computer execute while waiting for
a single 8-bit character to arrive?
3.14 What complexity does DMA present to the management of cache memory?
3.
Pages:
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125